In the semiconductor industry, it is known that growing a III-N material, such as GaN, on a silicon substrate is difficult due in large part to the large crystal lattice mismatch (−16.9%) and the thermal mismatch (53%) between silicon and GaN. Thus, some type of buffer layer or layers is generally formed on the silicon substrate and the III-N material is grown on the buffer layer. It is also known that during much of the growth process there must ideally be no exposed silicon surface due to detrimental reaction between silicon and the various MBE process gasses, i.e. N2 plasma, NH3 and metallic Ga. Also in the case where other growth processes are used, such as MOCVD process gasses (NH3, H2, TMGa, etc.). Reaction of silicon with process gasses usually results in etching of silicon (H2), formation of nitrides (NH3), or severe reaction and blistering (Ga precursors).
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide new and improved methods for the formation of a REO/aluminum oxide/aluminum nitride template on a silicon substrate.
It is another object of the present invention to provide new and improved methods for the formation of a template that includes eliminating or greatly reducing the problem of possible damage to the silicon substrate with process gasses.
It is another object of the present invention to provide a new and improved REO/aluminum oxide/aluminum nitride template on a silicon substrate.
It is another object of the present invention to provide new and improved LED and/or HEMT structures on a template on a silicon substrate.